Struct CompressionLane 

pub struct CompressionLane<const ROUNDS: usize, const ADDRESS_BITS: usize>
where
    W<ROUNDS>: BitWidth,
    W<ADDRESS_BITS>: BitWidth,
{ /* private fields */ }

Fully occupied SHA-256 compression pipeline with circular base-state delay.

The implementation accepts one input or bubble per cycle without backpressure. Its logical input-to-output latency is exactly ROUNDS cycles: the synchronous memory read is scheduled during the last round and therefore does not add a 65th registered transfer.

Storage contract

• round data and the 32-bit tag use resetless registers;
• only round-valid bits and the circular pointer reset;
• chaining values live in resetless [rhdl_fpga::core::ram::synchronous::SyncBRAM] storage and are ignored whenever the aligned round-valid bit is false;
• ROUNDS must be a power of two equal to 2^ADDRESS_BITS, and at least two.

The complete implementation is FullCompressionLane. Smaller power-of-two specializations are useful for fast lowering-equivalence tests.

Trait Implementations

impl<const ROUNDS: usize, const ADDRESS_BITS: usize> Clone for CompressionLane<ROUNDS, ADDRESS_BITS>

where W<ROUNDS>: BitWidth, W<ADDRESS_BITS>: BitWidth,

fn clone(&self) -> CompressionLane<ROUNDS, ADDRESS_BITS>

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl<const ROUNDS: usize, const ADDRESS_BITS: usize> Debug for CompressionLane<ROUNDS, ADDRESS_BITS>

where W<ROUNDS>: BitWidth, W<ADDRESS_BITS>: BitWidth,

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl<const ROUNDS: usize, const ADDRESS_BITS: usize> Default for CompressionLane<ROUNDS, ADDRESS_BITS>

where W<ROUNDS>: BitWidth, W<ADDRESS_BITS>: BitWidth,

fn default() -> Self

Returns the “default value” for a type.

impl<const ROUNDS: usize, const ADDRESS_BITS: usize> Synchronous for CompressionLane<ROUNDS, ADDRESS_BITS>

where W<ROUNDS>: BitWidth, W<ADDRESS_BITS>: BitWidth,

type S = (<CompressionLane<ROUNDS, ADDRESS_BITS> as SynchronousDQ>::Q, <RoundPipeline<ROUNDS> as Synchronous>::S, <SyncBRAM<[Bits<32>; 8], ADDRESS_BITS> as Synchronous>::S, <DFF<Bits<ADDRESS_BITS>> as Synchronous>::S)

The simulation state type. This type is used to represent the internal state of the circuit during simulation. It must be PartialEq and Clone. It holds whatever state is needed to compute the output of the circuit given it’s input. This state is typically auto-derived by the Synchronous derive macro, and it’s typically a struct containing the states of all the subcircuits, along with their last know outputs.

fn init(&self) -> Self::S

Initialize the simulation state. This method returns the initial state of the circuit for simulation. This is typically auto-derived by the Synchronous derive macro, and it typically initializes the states of all the subcircuits to their initial states.

fn children( &self, parent_scope: &ScopedName, ) -> impl Iterator<Item = Result<Descriptor<SyncKind>, RHDLError>>

Iterate over the child circuits of this circuit.

fn sim( &self, clock_reset: ClockReset, input: <Self as SynchronousIO>::I, state: &mut Self::S, ) -> <Self as SynchronousIO>::O

Simulate the circuit given it’s input, clock reset, and current state.

fn descriptor( &self, scoped_name: ScopedName, ) -> Result<Descriptor<SyncKind>, RHDLError>

Provides run time reflection of the circuit.

impl<const ROUNDS: usize, const ADDRESS_BITS: usize> SynchronousDQ for CompressionLane<ROUNDS, ADDRESS_BITS>

where W<ROUNDS>: BitWidth, W<ADDRESS_BITS>: BitWidth,

type Q = Q<ROUNDS, ADDRESS_BITS>

The type of the internal data output from the children of the circuit.

type D = D<ROUNDS, ADDRESS_BITS>

The type of the internal data input to the children of the circuit.

impl<const ROUNDS: usize, const ADDRESS_BITS: usize> SynchronousIO for CompressionLane<ROUNDS, ADDRESS_BITS>

where W<ROUNDS>: BitWidth, W<ADDRESS_BITS>: BitWidth,

type I = CompressionInput

The type of the input to the circuit.

type O = CompressionOutput

The type of the output from the circuit.

type Kernel = compression_lane_kernel<ROUNDS, ADDRESS_BITS>

The type of the kernel function used to compute the output and feedback. The kernel function must be a synthesizable function that takes a clock and reset signal, the input signal, and the feedback signal Q, and produces the output signal and feedback signal D.