Module axi 

Exact packed AXI4-Lite and 512-bit AXI4 channel types.

Structs

Axi512ReadKernelToMemory

Kernel-to-HBM0 signals for the read-only input master.

Axi512ReadMemoryToKernel

HBM0-to-kernel signals for the read-only input master.

Axi512WriteKernelToMemory

Kernel-to-HBM1 signals for the write-only output master.

Axi512WriteMemoryToKernel

HBM1-to-kernel signals for the write-only output master.

AxiLiteHostToKernel

Host-to-kernel AXI4-Lite signals.

AxiLiteKernelToHost

Kernel-to-host AXI4-Lite signals.

Constants

AXI_BURST_FIXED

Fixed burst encoding.

AXI_BURST_INCR

Incrementing burst encoding.

AXI_CACHE_NORMAL

Normal, non-buffered cache attributes used by the U280 shell.

AXI_LOCK_NORMAL

Normal nonexclusive access.

AXI_RESP_DECERR

Unmapped or misaligned control access.

AXI_RESP_EXOKAY

Exclusive success is deliberately rejected by this kernel.

AXI_RESP_OKAY

Successful AXI response.

AXI_RESP_SLVERR

Mapped access with invalid permissions or state.

AXI_SIZE_64_BYTES

One 64-byte transfer.

Functions

idle_read_master_kernel

Canonical idle input-read master signals.