signer · 2026-07-15

Production signer generated-Verilog equivalence

The immutable modular production bundle matched twelve independent fused WOTS results in a finite self-checking Verilator trace.

passed HASHSIGS_SHA256_GENERIC_V1

Identity and boundary

Evidence tier: Generated RTL simulation
Topology: Three clusters × four contexts; one linked lane definition elaborated three times
Cryptographic subject/source commit: dbd18593527673be2a93d7067ee03667892c582a
Cryptographic source dirty: no
Producing narrative: Read the privacy-sanitized source record
evidence/rtl/wots-production-signer-generated-verilog-2026-07-15.md

cargo run --release --locked -j1 -p rhdl-gen -- check --signer-full --temp-root <evidence-root> --keep

Measurement	Value	Context
jobs	`12 results`	four admitted to each cluster
output transfers	`420 beats`	twelve exact 35-beat frames
first final hold	`5 cycles`	registered output stability under backpressure

The exact finite generated-RTL trace matched twelve independent software-oracle results.
The linked hierarchy contains the intended three cluster paths and three effective lane paths.

Artifact	Published bytes	SHA-256
linked signer bundle	Digest only	`41fe7ba31ec811b6a69ebcb9d2e76af512b0b49af99b7c83389d5cf97b978e68`
final evidence manifest	Digest only	`5fb20020be4957b0d2fa83d77a42529e59bd2cc2da05a36cc9bd308a8a90b467`

Measure a sustained generated-RTL trace, then stage this exact bundle for U280 synthesis.