Function compression_lane_checked_verilog 

pub fn compression_lane_checked_verilog<const ROUNDS: usize, const ADDRESS_BITS: usize>() -> Result<String, RHDLError>
where
    W<ROUNDS>: BitWidth,
    W<ADDRESS_BITS>: BitWidth,

Emits and Icarus-checks a power-of-two lane specialization.

This is intended for small specializations because the pinned RHDL release emits the complete round array as one monolithic function; Icarus Verilog 13 cannot lex the full 64-stage form.

Errors

Returns an error if the specialization is invalid, RHDL lowering fails, or Icarus rejects the generated module hierarchy.